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The USB revolution

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Paul Merolla, John Arthur, and John Wittig

1 December 2005

The new high-performance interface allows rapid development of real-time applications.

We have all heard the quote, “Revolutions do not happen overnight”. Indeed, the USB revolution was years in the making: but soon after the USB (universal serial bus) board fired its first spike, nearly every member of our lab had abandoned their chip-testing setups to join the insurgency. This custom tool had ousted logic analyzers, pattern generators, digital I/O cards, and other bourgeois equipment. My comrades, we wish to spread the revolution.

We have two aims in this article: first, we want to demonstrate that, with the right components and driver, USB 2.0 offers a high-performance (7 million spikes/sec), portable (compatible with any PC), inexpensive (under $500 in parts and printed circuit board), and flexible (coded in C++) computer interface. Second, we want to describe how this interface has revolutionized the way in which we interact with our neuromorphic systems. Our obvious enthusiasm stems from the sentiment that our chips are no longer limited by the surrounding technology, but instead by our own creativity.


Hardware

To achieve the interactivity that we envision, the USB link must seamlessly integrate with our neuromorphic chips. A typical neuromorphic chip with 10,000 neurons1 can demand bandwidths exceeding 500,000 address−events2 per second (considering both the transmitter and receiver), and proposed multi−chip systems3 can increase this demand by ten−fold. In theory, USB2.0 can support 480Mb/s: to blast address−events at these rates, we must enlist the appropriate chip set.

We chose the USB Cypress FX2 transceiver chip because its configurable datapath allows us to meet our performance requirement of streaming millions of address events per second. Specifically, we can bypass the FX2's on−chip microcontroller (through a firmware assembly configuration file), which would otherwise introduce a devastating bottleneck for real−time data transfers. We use a pair of 4×256×16 bit (quadruple buffered) FIFOs (first in, first outs) on the FX2 for streaming address events to and from our chip (one for each direction).

The transfers are asynchronous and we match the address−event representation protocol to the FX2's protocol using a CPLD (complex programmable logic device from Lattice Semiconductor). And indeed, we realize a high−performance bidirectional link, achieving 7 million 16bit events per second, or 112Mb/s (see Figure 1).


USB 2.0 communicates between a PC and a neuromorphic system at 7 million 16bit events per second (duplex).


Software

With our high−performance USB2.0 link, we now have the ability to stream spikes (and other data) in real−time between a neuromorphic system and a software application (GUI, graphical user interface): the challenge is ensuring that the software can keep up. Since coding drivers is anathema to us hardware guys and gals, we decided to use the commercial USB driver from Thesycon. Naturally, this company is not the only game in town, but by following their Microsoft Visual C++ examples we were able to integrate real-time events into our software apps in no time. Essentially what Thesycon provides is the ability to probe the status of the FX2's FIFOs (both input and output). For instance, when an input FIFO buffer is full, the driver copies it to memory. At low event rates, this takes a while, so the CPLD injects timing events every 50μs. For the majority of the time, however, our GUI is free to process, plot, and save spike data.


The cochlear nucleus chip responds to sound encoded by auditory nerve spikes (inputs spikes). Chip activity displays neurons that fired recently according to chip layout (physical space) and cochlear mapping (frequency space). Spike rasters display 100 trials of a neuron's spike times during a 50ms stimulus, while phase histograms quantify spike-time precision. The selected bushy cell (address 69,0) phase-locks better than its inputs: its phase-histogram is tighter.

The GUI enables us to visualize chip activity, processing and plotting incoming spikes in real-time. Visualization, however, has the potential to hold up the link if FIFOs fill up faster than the screen can update. For this reason, we use openGL (the open graphics language), which plots extremely quickly.4 Of course, some of the more advanced plotting features (e.g., in three dimensions) are still too slow: it is not a general panacea. In practice, openGL suffices for the two dimensional plots we use.


iViva la revolución¡

The USB2.0 interface has become an essential part of testing, visualizing, and interacting with the neuromorphic systems in our lab. We briefly highlight some of the systems we have visualized using this link in Table 1. Note that, for each project, the GUI was specifically tailored to monitor the essential computation in that system. For instance, if we are interested in the phase-locking property of neurons, we can directly plot a metric that quantifies phase-locking: the task of finding neuron parameters that enhance phase-locking can now occur interactively (see Figure 2). The ostensible real-time advantage of neuromorphic systems over other modeling techniques is now apparent.

The high-performance USB2.0 interface we have described here has revolutionized the way in which we interact with our neuromorphic systems. Our strategy for designing this interface was to optimize the hardware so that the much of the computational burden was transparent to the software. This strategy has paid off, as evident from the rapid development (three weeks) of the five customized real-time applications.

Doing it on the fly5

RevolutionaryChipVisualization (all real time)
Bo WenInner earCochleagram (spectrum vs. time) with real sound input
Brian TabaAxon GuidanceActivity and histograms of ON-OFF retinal inputs for balanced topographic refinement
John ArthurHippocampusRasters and chip activity phase-coded in color
John Wittig JrCochlear NucleusRasters and histograms showing phase locking to sound waveforms.
Paul MerollaVisual CortexOrientation maps generated with drifting gratings



Authors

Paul Merolla
Bioengineering Department, University of Pennsylvania

John Arthur
Bioengineering Department, University of Pennsylvania

John Wittig
Bioengineering Department, University of Pennsylvania


References
  1. P. Merolla and P. K. Boahen, A Recurrent Model of Orientation Maps with Simple and Complex Cells, Advances in Neural Information Processing Systems 16, pp. 995-1002, MIT Press, 2004.

  2. K. A. Boahen, Point-to-Point Connectivity Between Neuromorphic Chips using Address-Events, IEEE Trans. on Circuits & Systems II 47 (5), pp. 416-434, 2000.

  3. T. Choi, P. Merolla, J. Arthur, K. Boahen and B. Shi., Neuromorphic Implementation of Orientation Hyper-columns, IEEE Trans. on Circuits & Systems I 52 (6), pp. 1049-1060, 2005.

  4. http://nehe.gamedev.net

  5. http://www.neuroengineering.upenn.edu/boahen/index.htm


 
DOI:  10.2417/1200512.0033

@NeuroEng



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